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Release 13.4 - xst O.87xd (lin64)
Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
-->
Parameter TMPDIR set to /home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/xst/projnav.tmp
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.06 secs
-->
Parameter xsthdpdir set to /home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/xst
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.06 secs
-->
WARNING:Xst:3164 - Option "-debug" found multiple times in the command line. Only the first occurence is considered.
=========================================================================
* HDL Compilation *
=========================================================================
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/controller_table.vhd" in Library work.
Architecture behavioral of Entity controller_table is up to date.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/Cache_SRAM.vhd" in Library work.
Entity <cache_sram> compiled.
Entity <cache_sram> (Architecture <behavioral>) compiled.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/cacheController.vhd" in Library work.
Entity <cachecontroller> compiled.
Entity <cachecontroller> (Architecture <behavioral>) compiled.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/mux2to1.vhd" in Library work.
Architecture behavioral of Entity mux2to1 is up to date.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/demux2to1.vhd" in Library work.
Architecture behavioral of Entity demux2to1 is up to date.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/cache.vhd" in Library work.
Entity <cache> compiled.
Entity <cache> (Architecture <behavioral>) compiled.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/CPU_gen.vhd" in Library work.
Architecture behavioral of Entity cpu_gen is up to date.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/SDRAM_controller.vhd" in Library work.
Architecture behavioral of Entity sdram_controller is up to date.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/project1.vhd" in Library work.
ERROR:HDLParsers:1015 - "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController3/project1.vhd" Line 182. Wait for statement unsupported.
Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 0.11 secs
-->
Total memory usage is 597716 kilobytes
Number of errors : 1 ( 0 filtered)
Number of warnings : 1 ( 0 filtered)
Number of infos : 0 ( 0 filtered)