Pinned Loading

1. RISC-V RISC-V Public

   This repo documents the implementation of a single cycle RISC V RV32I processor in a xc7a35tcpg236 FPGA

   SystemVerilog 2

2. FPGA-Market-Data-Engine FPGA-Market-Data-Engine Public

   Low-latency FPGA market data engine with ETH feed handler and 8-lane Top-of-Book processing pipeline

   SystemVerilog 1