Curated list of notes, books and other resources for the student of Nepal College of Information and Technology(NCIT) - Pokhara University, Nepal

Discover and create logic circuits

Logic Circuits from the Juice library

ViPeR 32-bit Pipelined RISC-V CPU

A continuation of the original Logisim circuit simulator by Carl Burch.

Materials for the Computer Science course, Digital Design (Logic Circuits)

Embedded domain-specific combinator library for the abstract assembly and automated synthesis of logical circuits.

Simple 6502 / 65C02 implementation

Sketch to Simulation Converter for logic circuits using a fine-tuned YOLO + OpenCV contour handling

Logic simulator with graphical editor

Analyze images of digital logic circuit schemes and automatically generate their truth tables.

This repository contains the CENG3010 Computer Organization course projects. The first project involves developing a GUI-based 32-bit MIPS simulator, while the second project centers on designing a custom 16-bit MIPS-like processor with a unique instruction set.

A repository for Logic Circuits course in Amirkabir University of Technology

My logic circuits course project at AUT

Design and implement the following components of the SPI modules using Verilog such that they match the requirements of the development testbench and match the SPI specifications: Master-Slave Self-Checking Testbenches for the Master and Slave

A comprehensive digital clock project featuring both logic circuit design and Arduino-based implementation with real-time clock functionality, alarm system, and user interface.

Atividades desenvolvidas durante as aulas de Sistemas Digitais

Gate-level implementation of a full-adder using Verilog, complete with a testbench, truth table validation, and waveform analysis for beginners in digital logic design.

Design and implementation an arithmetic unit that is capable of adding, subtracting, and multiplying two signed magnitude numbers, and displays the result of the operation performed along with some additional flags regarding the operation and the result using Logisim.

Digital Design laboratory project exploring sequential logic circuits, including latches and flip-flops (RS, D, JK, T, Master-Slave), with interactive NI Multisim simulations and detailed documentation (Logic Design, UNIWA).